EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 228

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Table 136. Op Code Map—First Op Code
Legend
First Operand
Op-Code Map
PS015308-0404
Op Code
E
F
A
B
C
D
0
1
2
3
4
5
6
7
8
9
Nibble
Upper
Notes: n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
(HL),B
DJNZ
suffix
NOP
NZ,d
NC,d
ADD
SUB
AND
RET
RET
RET
RET
.SIS
D,B
H,B
A,B
A,B
A,B
OR
A,B
NZ
NC
PO
JR
JR
LD
LD
LD
P
0
d
Lower Op Code Nibble
(HL),C
Mmn
Mmn
Mmn
Mmn
ADD
SUB
AND
POP
POP
POP
POP
BC,
DE,
B,C
D,C
H,C
A,C
A,C
A,C
A,C
HL,
SP,
OR
BC
DE
LD
LD
LD
LD
LD
LD
LD
LD
HL
AF
A
1
AND
A,H
Tables 136 through 142 indicate the hex values for each of the eZ80
4
(Mmn),
(Mmn),
(BC),A
(DE),A
(HL),D
suffix
ADD
AND
Mmn
Mmn
Mmn
Mmn
SUB
.SIL
B,D
H,D
A,D
A,D
A,D
A,D
NC,
PO,
OR
NZ,
LD
LD
LD
HL
LD
LD
LD
LD
JP
JP
JP
JP
P,
A
2
Second Operand
(SP),HL
Mnemonic
(HL),E
ADD
AND
Mmn
OUT
(n),A
SUB
INC
INC
INC
INC
B,E
D,E
H,E
A,E
A,E
A,E
A,E
OR
BC
DE
HL
SP
LD
LD
LD
LD
EX
JP
DI
3
(HL),H
CALL
CALL
CALL
CALL
ADD
AND
Mmn
Mmn
Mmn
Mmn
(HL)
SUB
INC
INC
INC
INC
B,H
D,H
H,H
A,H
A,H
A,H
A,H
NZ,
NC,
PO,
OR
LD
LD
LD
LD
P,
B
D
H
4
(HL),L
PUSH
PUSH
PUSH
PUSH
DEC
DEC
DEC
DEC
ADD
AND
(HL)
SUB
B,L
D,L
H,L
A,L
A,L
A,L
OR
A,L
LD
LD
LD
LD
BC
DE
HL
AF
B
D
H
5
D,(HL)
H,(HL)
(HL),n
B,(HL)
A,(HL)
A,(HL)
A,(HL)
A,(HL)
HALT
P R E L I M I N A R Y
ADD
AND
ADD
AND
SUB
SUB
B,n
D,n
H,n
OR
A,n
A,n
A,n
OR
A,n
LD
LD
LD
LD
LD
LD
LD
6
Lower Nibble (Hex)
(HL),A
RLCA
DAA
ADD
SUB
AND
RLA
SCF
RST
RST
RST
RST
B,A
D,A
H,A
A,A
A,A
A,A
A,A
00h
10h
20h
30h
OR
LD
LD
LD
LD
7
AF,AF’
CF,d
ADC
SBC
XOR
RET
RET
RET
RET
C,B
E,B
A,B
A,B
A,B
A,B
A,B
Z,d
L,B
CP
EX
JR
JR
JR
LD
LD
LD
LD
CF
PE
M
8
d
Z
HL,BC
HL,DE
HL,SP
HL,HL
SP,HL
suffix
ADD
ADD
ADD
ADD
ADC
SBC
XOR
RET
EXX
(HL)
.LIS
E,C
L,C
A,C
A,C
A,C
A,C
A,C
CP
LD
LD
LD
LD
JP
9
A,(BC)
A,(DE)
(Mmn)
(Mmn)
Mmn
Mmn
Mmn
Mmn
ADC
SBC
XOR
C,D
HL,
E,D
L,D
A,D
A,D
A,D
A,D
A,D
PE,
CP
CF,
LD
LD
LD
LD
LD
LD
LD
LD
JP
JP
JP
JP
M,
A,
Z,
A
Second Op
Code after
Op Code
DE,HL
Map—
suffix
0CBh
DEC
DEC
DEC
DEC
ADC
SBC
XOR
A,(n)
C,E
.LIL
A,E
A,E
A,E
A,E
A,E
BC
DE
L,E
CP
HL
SP
LD
LD
LD
EX
IN
EI
B
Product Specification
CALL
CALL
CALL
CALL
Mmn
Mmn
Mmn
Mmn
ADC
SBC
XOR
INC
INC
INC
INC
C,H
E,H
L,H
A,H
A,H
A,H
A,H
A,H
PE,
CP
CF,
LD
LD
LD
LD
®
M,
Z,
C
C
E
L
A
eZ80F92/eZ80F93
CPU instructions.
Second Op
Code After
Second Op
Code After
Second Op
Code After
Op Code
Op Code
Op Code
Map—
Map—
Map—
CALL
0DDh
0EDh
0FDh
DEC
DEC
DEC
DEC
ADC
XOR
Mmn
SBC
C,L
E,L
A,L
A,L
A,L
A,L
A,L
LD
LD
LD
L,L
LD
CP
D
C
E
A
L
Op-Code Map
C,(HL)
E,(HL)
L,(HL)
A,(HL)
A,(HL)
A,(HL)
A,(HL)
A,(HL)
ADC
XOR
ADC
XOR
SBC
SBC
C,n
E,n
A,n
A,n
A,n
A,n
A,n
LD
LD
LD
L,n
LD
LD
LD
LD
LD
CP
CP
E
RRCA
XOR
RRA
CCF
ADC
SBC
RST
RST
RST
RST
CPL
C,A
08h
18h
28h
38h
E,A
L,A
A,A
A,A
A,A
A,A
A,A
CP
LD
LD
LD
LD
F
216