R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 851
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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H8S/2456, H8S/2456R, H8S/2454 Group
This LSI has an on-chip 8-bit timer module with two channels operating on the basis of an 8-bit
counter. The 8-bit timer module can be used to count external events and be used as a
multifunction timer in a variety of applications, such as generation of counter reset, interrupt
requests, and pulse output with an arbitrary duty cycle using a compare-match signal with two
registers.
13.1
• Selection of seven clock sources
• Selection of three ways to clear the counters
• Timer output control by a combination of two compare match signals
• Provision for cascading of two channels (TMR_0 and TMR_1)
• Three independent interrupts
• A/D converter conversion start trigger can be generated
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
The counters can be driven by one of six internal clock signals (φ/2, φ/8, φ/32, φ/64, φ/1024, or
φ/8192) or an external clock input
The counters can be cleared on compare match A or B, or by an external reset signal (rising
edge, rising and falling edges, falling edge, low level, or high level)
The timer output signal in each channel is controlled by a combination of two independent
compare match signals, enabling the timer to generate output waveforms with an arbitrary duty
cycle or PWM output
Operation as a 16-bit timer is possible, using TMR_0 for the upper 8 bits and TMR_1 for the
lower 8 bits (16-bit count mode)
TMR_1 can be used to count TMR_0 compare matches (compare match count mode)
Compare match A and B and overflow interrupts can be requested independently
Features
Section 13 8-Bit Timers (TMR)
Section 13 8-Bit Timers (TMR)
Page 821 of 1392
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