R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 388

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 DMA Controller (DMAC)
7.5.3
Idle mode can be specified by setting the RPE bit in DMACR and DTIE bit in DMABCRL to 1. In
idle mode, one byte or word is transferred in response to a single transfer request, and this is
executed the number of times specified in ETCR. One address is specified by MAR, and the other
by IOAR. The transfer direction can be specified by the DTDIR bit in DMACR. Table 7.6
summarizes register functions in idle mode.
Page 358 of 1392
Idle Mode
Sequential mode setting
and transfer destination
Set number of transfers
Set transfer source
Read DMABCRL
Set DMABCRH
Sequential mode
Set DMABCRL
Set DMACR
addresses
Figure 7.4 Example of Sequential Mode Setting Procedure
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set each bit in DMABCRH.
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
• Specify enabling or disabling of transfer end
• Set the DTE bit to 1 to enable transfer.
• Clear the FAE bit to 0 to select short address
• Specify enabling or disabling of internal
destination address in MAR and IOAR.
• Set the transfer data size with the DTSZ bit.
• Specify whether MAR is to be incremented or
• Clear the RPE bit to 0 to select sequential
• Specify the transfer direction with the DTDIR
• Select the activation source with bits DTF3 to
decremented with the DTID bit.
mode.
bit.
DTF0.
mode.
interrupt clearing with the DTA bit.
interrupts with the DTIE bit.
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010