R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1093

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
18.3.1
There are eight 16-bit read-only ADDR registers, ADDRA to ADDRH, used to store the results of
A/D conversion. The ADDR registers, which store a conversion result for each channel, are shown
in tables 18.3 and 18.4.
The converted 10-bit data is stored in bits 15 to 6. The lower 6-bit data is always read as 0.
The data bus between the CPU and the A/D converter has a 16-bit width. The data can be read
directly from the CPU. ADDR must not be accessed in 8-bit units and must be accessed in 16-bit
units.
Table 18.3 Analog Input Channels and Corresponding ADDR Registers
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Analog Input Channel
Channel Set 0
(CH3 = 0)
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
A/D Data Registers A to H (ADDRA to ADDRH)
(H8S/2456 Group and H8S/2456R Group)
Data Register Storing
Conversion Result
ADDRA_0
ADDRB_0
ADDRC_0
ADDRD_0
ADDRE_0
ADDRF_0
ADDRG_0
ADDRH_0
Analog Input Channel
Channel Set 1
(CH3 = 1)
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
Data Register Storing
Conversion Result
ADDRA_1
ADDRB_1
ADDRC_1
ADDRD_1
ADDRE_1
ADDRF_1
ADDRG_1
ADDRH_1
Section 18 A/D Converter
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