R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1137

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
20.3.4
SSER performs transfer/receive control of synchronous serial communication and setting of
interrupt enable.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
7
6
5, 4
3
2
1
0
Bit Name
TE
RE
⎯
TEIE
TIE
RIE
CEIE
SS Enable Register (SSER)
Initial
Value
0
0
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Transmit Enable
When this bit is set to 1, transmission is enabled.
Receive Enable
When this bit is set to 1, reception is enabled.
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit End Interrupt Enable
When this bit is set to 1, a TEI interrupt request is
enabled.
Transmit Interrupt Enable
When this bit is set to 1, a TXI interrupt request is
enabled.
Receive Interrupt Enable
When this bit is set to 1, an RXI interrupt request and
an OEI interrupt request are enabled.
Conflict Error Interrupt Enable
When this bit is set to 1, a CEI interrupt request is
enabled.
Section 20 Synchronous Serial Communication Unit (SSU)
Page 1107 of 1392