R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 489

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
(2)
When the EDA bit is set to 1 in EDMDR, an EXDMA transfer cycle is started a minimum of three
cycles later. Once transfer is started, it continues (as a burst) until the transfer end condition is
satisfied.
If the BGUP bit is 1 in EDMDR, the bus is transferred in the event of a bus request from another
bus master.
Transfer requests for other channels are held pending until the end of transfer on the current
channel.
Figures 8.31 to 8.34 show operation timing examples for various conditions.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
φ pin
Bus cycle
CPU
operation
ETEND
EDA bit
Auto Request/Burst Mode/Normal Transfer Mode
CPU cycle CPU cycle
External
1
space
Figure 8.31 Auto Request/Burst Mode/Normal Transfer Mode
External
space
(CPU Cycles/Dual Address Mode/BGUP = 0)
EXDMA
External
space
read
EXDMA
write
EXDMA
read
EXDMA
write
Repeated
Section 8 EXDMA Controller (EXDMAC)
Last transfer cycle
EXDMA
read
EXDMA
write
Page 459 of 1392
CPU cycle
0