R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 23

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.5 Multiprocessor Communication Function.......................................................................... 905
15.6 Operation in Clocked Synchronous Mode ......................................................................... 912
15.7 Operation in Smart Card Interface Mode........................................................................... 921
15.8 IrDA Operation .................................................................................................................. 935
15.9 Interrupt Sources................................................................................................................ 938
15.10 Usage Notes ....................................................................................................................... 942
15.4.3 Clock..................................................................................................................... 897
15.4.4 SCI Initialization (Asynchronous Mode).............................................................. 898
15.4.5 Data Transmission (Asynchronous Mode) ........................................................... 899
15.4.6 Serial Data Reception (Asynchronous Mode) ...................................................... 901
15.5.1 Multiprocessor Serial Data Transmission ............................................................. 906
15.5.2 Multiprocessor Serial Data Reception .................................................................. 908
15.6.1 Clock..................................................................................................................... 912
15.6.2 SCI Initialization (Clocked Synchronous Mode).................................................. 913
15.6.3 Serial Data Transmission (Clocked Synchronous Mode) ..................................... 914
15.6.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 917
15.6.5 Simultaneous Serial Data Transmission and Reception
15.7.1 Pin Connection Example ...................................................................................... 921
15.7.2 Data Format (Except for Block Transfer Mode)................................................... 922
15.7.3 Block Transfer Mode ............................................................................................ 923
15.7.4 Receive Data Sampling Timing and Reception Margin ....................................... 924
15.7.5 Initialization.......................................................................................................... 926
15.7.6 Data Transmission (Except for Block Transfer Mode)......................................... 927
15.7.7 Serial Data Reception (Except for Block Transfer Mode).................................... 930
15.7.8 Clock Output Control............................................................................................ 933
15.9.1 Interrupts in Normal Serial Communication Interface Mode ............................... 938
15.9.2 Interrupts in Smart Card Interface Mode .............................................................. 940
15.10.1 Module Stop Function Setting .............................................................................. 942
15.10.2 Break Detection and Processing ........................................................................... 942
15.10.3 Mark State and Break Sending ............................................................................. 942
15.10.4 Receive Error Flags and Transmit Operations
15.10.5 Relation between Writes to TDR and the TDRE Flag .......................................... 943
15.10.6 Restrictions on Use of DMAC or DTC................................................................. 943
15.10.7 Operation in Case of Mode Transition.................................................................. 944
(Clocked Synchronous Mode) .............................................................................. 919
(Clocked Synchronous Mode Only) ..................................................................... 942
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