R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 445

MCU 128KKB FLASH 48K 144-LQFP

R4F24568NVFQV

Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of R4F24568NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
R4F24568NVFQV
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REA
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Part Number:
R4F24568NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
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H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
14
13
12
11
Bit Name
BEF
EDRAKE
ETENDE
EDREQS
Initial Value
0
0
0
0
R/W
R/(W) *
R/W
R/W
R/W
Description
Block Transfer Error Flag
Flag that indicates the occurrence of an error
during block transfer. If an NMI interrupt is
generated during block transfer, the EXDMAC
immediately terminates the EXDMA operation and
sets this bit to 1. The address registers indicate
the next transfer addresses, but the data for which
transfer has been performed within the block size
is lost.
0: No block transfer error
[Clearing condition]
Writing 0 to BEF after reading BEF = 1
1: Block transfer error
[Setting condition]
NMI interrupt during block transfer
EDRAK Pin Output Enable
Enables output from the EDREQ
acknowledge/transfer processing start (EDRAK)
pin.
0: EDRAK pin output disabled
1: EDRAK pin output enabled
ETEND Pin Output Enable
Enables output from the EXDMA transfer end
(ETEND) pin.
0: ETEND pin output disabled
1: ETEND pin output enabled
EDREQ Select
Specifies low level sensing or falling edge sensing
as the sampling method for the EDREQ pin used
in external request mode.
0: Low level sensing (Low level sensing is used
1: Falling edge sensing
for the first transfer after transfer is enabled.)
Section 8 EXDMA Controller (EXDMAC)
Page 415 of 1392

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