R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1002

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 USB Function Module (USB)
16.3.25 Endpoint Stall Register 1 (EPSTL1)
Bits 2 to 0 in EPSTL1 are used to forcibly stall the corresponding endpoints on the application
side. While a bit is set to 1, the corresponding endpoint returns a stall handshake to the host. Bits 6
to 4 are used to clear the stall settings for the endpoints (bits 2 to 0). Writing 1 to the stall setting
bit and stall clear bit for an endpoint at the same time is prohibited.
For detailed operation, see section 16.7, Stall Operations.
Page 972 of 1392
Bit
7
6
5
4
3
2
1
0
Bit Name
⎯
EP3 STLC
EP2 STLC
EP1 STLC
⎯
EP3 STLS
EP2 STLS
EP1 STLS
Initial
Value
0
0
0
0
0
0
0
0
R/W
⎯
W
W
W
⎯
R/W
R/W
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
EP3 Stall Clear
Writing 1 to this bit clears the EP3 STLS bit to 0.
Writing 0 is ignored.
EP2 Stall Clear
Writing 1 to this bit clears the EP2 STLS bit to 0.
Writing 0 is ignored.
EP1 Stall Clear
Writing 1 to this bit clears the EP1 STLS bit to 0.
Writing 0 is ignored.
Reserved
This bit is always read as 0. The write value should
always be 0.
EP3 Stall Setting
Writing 1 to this bit specifies a stall for EP3. Writing 0
is ignored.
EP2 Stall Setting
Writing 1 to this bit specifies a stall for EP2. Writing 0
is ignored.
EP1 Stall Setting
Writing 1 to this bit specifies a stall for EP1. Writing 0
is ignored.
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010