R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 254
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 6 Bus Controller (BSC)
6.7.2
With DRAM space, the row address and column address are multiplexed. In address multiplexing,
the size of the shift of the row address is selected with bits MXC2 to MXC0 in DRAMCR. Table
6.6 shows the relation between the settings of MXC2 to MXC0 and the shift size.
The MXC2 bit should be cleared to 0 when the DRAM interface is used.
Table 6.6
[Legend]
×:
Page 224 of 1392
Row
address
Column
address
MXC2
Don't care.
Address Multiplexing
0
1
0
1
DRAMCR
Relation between Settings of Bits MXC2 to MXC0 and Address Multiplexing
MXC1
0
1
×
×
×
MXC0
0
1
0
1
×
×
×
Shift
Size
10 bits
11 bits
8 bits
9 bits
⎯
A23
to
A16 A15 A14 A13 A12 A11 A10 A9
A23
A16
A23
A16
A23
A16
A23
A16
A23
A16
to
to
to
to
to
A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A15 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A15 A14 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A15 A14 A13 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
A15 A14 A13 A12 A11 A10
Reserved (setting prohibited)
Reserved (setting prohibited)
Address Pins
A9
A8
A8
H8S/2456, H8S/2456R, H8S/2454 Group
A7
A7
A6
A6
REJ09B0467-0350 Rev. 3.50
A5
A5
A4
A4
A3
A3
A2
A2
Jul 07, 2010
A1
A9
A1
A0
A8
A9
A0
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