R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 310

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
(3)
In this LSI, if the ACSE bit is set to 1 in MSTPCRH, and then a SLEEP instruction is executed
with the setting for all peripheral module clocks to be stopped (MSTPCR = H'FFFF, EXMSTPCR
= H'FFFF) or for operation of the 8-bit timer module alone (MSTPCR = H'FFFE, EXMSTPCR =
H'FFFF), and a transition is made to the sleep state, the all-module-clocks-stopped mode is
entered, in which the bus controller and I/O port clocks are also stopped.
As the bus controller clock is also stopped in this mode, auto refreshing is not executed. If
synchronous DRAM is connected to the external address space and DRAM data is to be retained
in sleep mode, the ACSE bit must be cleared to 0 in MSTPCR.
(4)
When a transition is made to normal software standby, the PALL command is not output. If
synchronous DRAM is connected and DRAM data is to be retained in software standby, self-
refreshing must be set.
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DQMU, DQML
Precharge-sel
Address bus
Figure 6.70 Example of Timing when Precharge Time after Self-Refreshing Is Extended
SDRAM
Data bus
CKE
RAS
CAS
Refreshing and All-Module-Clocks-Stopped Mode
Software Standby
WE
φ
φ
by 2 States (TPCS2 to TPCS0 = H'2, TPC1 = 0, TPC0 = 0, CAS Latency 2)
Software
standby
NOP
T
Rc2
T
Rp1
T
Rp2
Column address
PALL
T
p
Row address
Row address
Continuous synchronous DRAM space write
ACTV
T
H8S/2456, H8S/2456R, H8S/2454 Group
r
T
NOP
c1
REJ09B0467-0350 Rev. 3.50
Column address
NOP
T
cl
NOP
Jul 07, 2010
T
c2