R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 831
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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H8S/2456, H8S/2456R, H8S/2454 Group
12.3.1
NDERH and NDERL enable or disable pulse output on a bit-by-bit basis. For outputting pulse by
the PPG, set the corresponding DDR to 1.
•
•
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
NDERH
NDERL
Bit Name
NDER15
NDER14
NDER13
NDER12
NDER11
NDER10
NDER9
NDER8
Bit Name
NDER7
NDER6
NDER5
NDER4
NDER3
NDER2
NDER1
NDER0
Next Data Enable Registers H and L (NDERH, NDERL)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Next Data Enable 15 to 8
When a bit is set to 1, the value in the
corresponding NDRH bit is transferred to the
PODRH bit by the selected output trigger. Values
are not transferred from NDRH to PODRH for
cleared bits.
Description
Next Data Enable 7 to 0
When a bit is set to 1, the value in the
corresponding NDRL bit is transferred to the
PODRL bit by the selected output trigger. Values
are not transferred from NDRL to PODRL for
cleared bits.
Section 12 Programmable Pulse Generator (PPG)
Page 801 of 1392
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