R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 252

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
When consecutively reading from the same area connected to a peripheral LSI whose output
floating time is long, data outputs from the peripheral LSI may conflict with address outputs from
this LSI. The data conflict can be avoided by inserting the CS assertion period extension cycle
after the access cycle. Figure 6.32 shows an example of the operation. In the figure, both bus
cycles A and B are read access cycles to the same area which is address/data multiplexed I/O
space. (a) shows an example of conflict occurring between data outputs from the peripheral LSI
whose output floating time is long and address outputs from this LSI because the CS assertion
period extension cycle is not inserted. (b) shows an example of the data conflict being avoided by
inserting the CS assertion period extension cycle.
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Address/data
bus
Address bus
CS
AH
RD
φ
(a) Without CS assertion period extension cycle
(CSXTn = 0)
Bus cycle A
Figure 6.32 Consecutive Read Accesses to Same Area
Output floating
time is long
(Address/Data Multiplexed I/O Space)
Bus cycle B
Data conflict
Address/data
bus
Address bus
WR
CS
RD
φ
Bus cycle A
(b) With CS assertion period extension cycle
(CSXTn = 1)
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Bus cycle B
Jul 07, 2010