R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 447

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
6
5
4
Bit Name
IRF
TCEIE
SDIR
Initial Value
0
0
0
R/W
R/(W) *
R/W
R/W
Single Address Direction
Description
Interrupt Request Flag
Flag indicating that an interrupt request has
occurred and transfer has ended.
0: No interrupt request
[Clearing conditions]
•
•
1: Interrupt request occurrence
[Setting conditions]
•
•
•
Transfer Counter End Interrupt Enable
Enables or disables transfer end interrupt requests
by the transfer counter. When transfer ends
according to the transfer counter while this bit is
set to 1, the IRF bit is set to 1, indicating that an
interrupt request has occurred.
0: Transfer end interrupt requests by transfer
1: Transfer end interrupt requests by transfer
Specifies the data transfer direction in single
address mode. In dual address mode, the
specification by this bit is ignored.
0: Transfer direction: EDSAR → external device
1: Transfer direction: External device with
counter are disabled
counter are enabled
with DACK
DACK→ EDDAR
Writing 1 to the EDA bit
Writing 0 to IRF after reading IRF = 1
Transfer end interrupt request generated by
transfer counter
Source address repeat area overflow interrupt
request
Destination address repeat area overflow
interrupt request
Section 8 EXDMA Controller (EXDMAC)
Page 417 of 1392