R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1029
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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H8S/2456, H8S/2456R, H8S/2454 Group
(1)
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Setup Stage
Notes: 1. In the setup stage, the application analyzes command data from the host requiring processing by
Receive 8-byte command
SETUP token reception
Set setup command
reception complete flag.
(IFR1.SETUP TS = 1)
2. When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
to be processed by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
To data stage
data in EP0s
application?
Command
Yes
USB function
Figure 16.11 Setup Stage Operation
No
processing by
Interrupt request
this module
Automatic
Clear SETUP TS flag.
(IFR1.SETUP TS = 0)
Clear EP0i FIFO. (FCLR0.EP0iCLR = 1)
Clear EP0o FIFO..(FCLR0.EP0oCLR = 1)
To control-in
Decode command data.
Determine data stage direction.*
Write 1 to EP0s read complete bit.
(TRG0.EP0s RDFN = 1)
data stage
Read 8-byte data from EP0s.
Section 16 USB Function Module (USB)
Application
*
2
To control-out
data stage
1
Page 999 of 1392
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