R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 469
![MCU 128KKB FLASH 48K 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R4F24568NVFQV
Manufacturer:
REA
Quantity:
15
Company:
Part Number:
R4F24568NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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H8S/2456, H8S/2456R, H8S/2454 Group
Figure 8.11 shows EDTCR update operations in normal transfer mode and block transfer mode.
(4)
The EDA bit in EDMDR is written to by the CPU to control enabling and disabling of data
transfer, but may be cleared automatically by the EXDMAC due to the EXDMA transfer status.
There are also periods during transfer when a 0-write to the EDA bit by the CPU is not
immediately effective.
Conditions for EDA bit clearing by the EXDMAC include the following:
• When the EDTCR value changes from 1 to 0, and transfer ends
• When a repeat area overflow interrupt is requested, and transfer ends
• When an NMI interrupt is generated, and transfer halts
• A reset
• Hardware standby mode
• When 0 is written to the EDA bit, and transfer halts
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
EDA Bit in EDMDR
EDTCR in normal transfer mode
EDTCR
EDTCR
EDTCR in block transfer mode
EDTCR
EDTCR
Figure 8.11 EDTCR Update Operations in Normal Transfer Mode and
23
23
23
23
Block
Block
size
size
16
16
1 to H'FFFFFF
Before update
Before update
15
15
0
1 to H'FFFF
Block Transfer Mode
0
0
0
0
0
Fixed
Fixed
–1
–1
23
23
23
23
Block
Block
size
size
Section 8 EXDMA Controller (EXDMAC)
16
16
0 to H'FFFFFE
After update
After update
15
15
0
0 to H'FFFE
0
Page 439 of 1392
0
0
0
0
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