R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 363

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
(2)
•
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
15
14
13
12
11
DMACR_0A and DMACR_1A
Full Address Mode
Bit Name
DTSZ
SAID
SAIDE
BLKDIR
BLKE
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Data Transfer Size
Selects the size of data to be transferred at one
time.
0: Byte-size transfer
1: Word-size transfer
Source Address Increment/Decrement
Source Address Increment/Decrement Enable
These bits specify whether source address
register MARA is to be incremented,
decremented, or left unchanged, when data
transfer is performed.
00: MARA is fixed
01: MARA is incremented after a data transfer
•
•
10: MARA is fixed
11: MARA is decremented after a data transfer
•
•
Block Direction
Block Enable
These bits specify whether normal mode or block
transfer mode is to be used for data transfer. If
block transfer mode is specified, the BLKDIR bit
specifies whether the source side or the
destination side is to be the block area.
x0: Transfer in normal mode
01: Transfer in block transfer mode (destination
11: Transfer in block transfer mode (source side is
When DTSZ = 0, MARA is incremented by 1
When DTSZ = 1, MARA is incremented by 2
When DTSZ = 0, MARA is decremented by 1
When DTSZ = 1, MARA is decremented by 2
side is block area)
block area)
Section 7 DMA Controller (DMAC)
Page 333 of 1392