R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1263

MCU 128KKB FLASH 48K 144-LQFP

R4F24568NVFQV

Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of R4F24568NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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H8S/2456, H8S/2456R, H8S/2454 Group
24.5
24.5.1
In software standby mode, I/O port states are retained. Therefore, there is no reduction in current
dissipation for the output current when a high-level signal is output.
24.5.2
Current dissipation increases during the oscillation stabilization standby period.
24.5.3
Depending on the operating status of the EXDMAC, DMAC, or DTC, the MSTP14 to MSTP13
and may not be set to 1. Setting of the EXDMAC, DMAC, or DTC module stop state should be
carried out only when the respective module is not activated.
For details, see section 8, EXDMA Controller (EXDMAC), section 7, DMA Controller (DMAC),
and section 9, Data Transfer Controller (DTC).
Note: The EXDMAC is not supported by the H8S/2454 Group.
24.5.4
Relevant interrupt operations cannot be performed in the module stop state. Consequently, if the
module stop state is entered when an interrupt has been requested, it will not be possible to clear
the CPU interrupt source or the DMAC or DTC activation source.
Interrupts should therefore be disabled before entering the module stop state.
Note: The EXDMAC is not supported by the H8S/2454 Group.
24.5.5
MSTPCR, EXMSTPCR, and RMMSTPCR should only be written to by the CPU.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Usage Notes
I/O Port Status
Current Dissipation during Oscillation Stabilization Standby Period
EXDMAC, DMAC, and DTC Module Stop
On-Chip Peripheral Module Interrupts
Writing to MSTPCR, EXMSTPCR, and RMMSTPCR
Section 24 Power-Down Modes
Page 1233 of 1392

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