R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1031
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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H8S/2456, H8S/2456R, H8S/2454 Group
(3)
The application first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is out-
transfer, the application waits for data from the host, and after data is received (EP0o TS bit in
IFR1 = 1), reads data from the FIFO. Next, the application writes 1 to the EP0o read complete bit,
empties the receive FIFO, and waits for reception of the next data.
The end of the data stage is identified when the host transmits an IN token and the status stage is
entered.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Data Stage (Control-Out)
Data reception from host
OUT token reception
OUT token reception
Set EP0o reception
complete flag.
(IFR1.EP0o TS = 1)
Figure 16.13 Data Stage (Control-Out) Operation
to TRG0.EP0o
to TRG0.EP0s
USB function
1 written
1 written
RDFN?
RDFN?
Yes
Yes
ACK
No
Interrupt request
No
NAK
NAK
Read data from EP0o
receive data size register
(EPSZ0o).
Write 1 to EP0o read
complete bit.
(TRG0.EP0o RDFN = 1)
Read data from EP0o
data register (EPDR0o).
Clear EP0o reception
complete flag.
(IFR1.EP0o TS = 0)
Application
Section 16 USB Function Module (USB)
Page 1001 of 1392
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