R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1001
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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H8S/2456, H8S/2456R, H8S/2454 Group
16.3.24 Endpoint Stall Register 0 (EPSTL0)
Bit 0 in EPSTL0 is used to forcibly stall endpoint 0 on the application side. While the bit is set to
1, the corresponding endpoint returns a stall handshake to the host. Bit 4 is used to clear the stall
setting in bit 0. Writing 1 to the EP0 stall setting bit and stall clear bit at the same time is
prohibited.
The stall bit for endpoint 0 is cleared automatically on reception of 8-byte setup command data for
which decoding is performed by firmware the EP0 STLS bit is cleared. When the SETUPTS flag
in the IFR1 is set to 1, writing 1 to the EP0 STLS bit is ignored. For detailed operation, see section
16.7, Stall Operations.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
7
6
5
4
3
2
1
0
Bit Name
⎯
⎯
⎯
EP0 STLC
⎯
⎯
⎯
EP0 STLS
Initial
Value
0
0
0
0
0
0
0
0
R/W
⎯
⎯
⎯
W
⎯
⎯
⎯
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
EP0 Stall Clear
Writing 1 to this bit clears the EP0 STLS bit to 0.
Writing 0 is ignored.
Reserved
These bits are always read as 0. The write value
should always be 0.
EP0 Stall Setting
Writing 1 to this bit specifies a stall for EP0. Writing 0
is ignored.
Section 16 USB Function Module (USB)
Page 971 of 1392
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