R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 619

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
10.7.4
P8ODR specifies the output type of each port 8 pin.
10.7.5
Port 8 pins also function as SCI I/Os, interrupt inputs, EXDMAC I/Os, PPG outputs, TPU I/Os,
and 8-bit timer I/Os. The correspondence between the register specification and the pin functions
is shown below.
(1)
• P85/EDACK3/IRQ5-B/SCK3/PO5-B/TIOCB4-B/TMO1-B
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
7, 6
5
4
3
2
1
0
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, TPU channel 4 settings (by bits MD3 to MD0 in TMDR_4, bits IOB3 to
IOB0 in TIOR_4, and bits CCLR1 and CCLR0 in TCR_4), bits OS3 to OS0 in TCSR_1 of the
8-bit timer, bit NDER5 in NDERL of PPG, bit AMS in EDMDR_3 of EXDMAC, bit C/A in
SMR_3 and bits CKE0 and CKE1 in SCR_3 of SCI, bits PPGS, TPUS, and TMRS in PFCR3,
bit P85DDR, and bit ITS5 in ITSR of the interrupt controller.
Pin Functions of H8S/2456 Group and H8S/2456R Group
Bit Name
⎯
P85ODR
P84ODR
P83ODR
P82ODR
P81ODR
P80ODR
Port 8 Open Drain Control Register (P8ODR)
Pin Functions
Initial Value
All 0
0
0
0
0
0
0
R/W
⎯
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. Only the initial
values should be written to these bits.
Setting a P8ODR bit to 1 makes the corresponding
pin an NMOS open-drain output pin, while clearing
a P8ODR bit to 0 makes the corresponding pin a
CMOS output pin.
Bits 4, 2, and 0 are reserved in the H8S/2454
Group.
Section 10 I/O Ports
Page 589 of 1392