R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1017

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
Note:
• USB INTN0 signal
• USB INTN1 signal
• USB INTN2 signal
• USB INTN3 signal
• RESUME signal
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Register
IFR2
DMA transfer request signal only for EP1. See section 16.8, DMA Transfer.
DMA transfer request signal only for EP2. See section 16.8, DMA Transfer.
The USB INTN2 signal requests interrupt sources for which the corresponding bits in interrupt
select registers 0 and 2 (ISR0 and ISR2) are cleared to 0. The USB INTN2 is driven low if a
corresponding bit in the interrupt flag register is set to 1.
The USBINTN3 signal requests interrupt sources for which the corresponding bits in interrupt
select registers 0 to 2 (ISR0 and ISR2) are cleared to 0. The USB INTN3 is driven low if a
corresponding bit in the interrupt flag register is set to 1.
The RESUME signal is a resume interrupt signal for canceling software standby mode. The
RESUME signal is driven low at the transition to the resume state for canceling software
standby mode.
*
Bit
0
1
2
3
4
5
6
7
EP0 interrupts must be assigned to the same interrupt request signal.
Transfer
Mode
Bulk_out
transfer
(EP1)
Bulk_in
transfer
(EP2)
Interrupt_in
transfer
(EP3)
⎯
⎯
Interrupt
Source
EP1_FULL
EP2_ALLEMP
EP2_EMPTY
EP2_TR
EP3_TS
EP3_TR
Reserved
Reserved
Description
EP1 FIFO full
EP2 FIFO all empty
EP2 FIFO empty
EP2 transfer request
EP3 transmission
complete
EP3 transfer request
⎯
⎯
Interrupt
Request Signal
USBINTN2 or USBINTN3 USBINTN0
USBINTN2 or USBINTN3 x
USBINTN2 or USBINTN3 USBINTN1
USBINTN2 or USBINTN3 x
USBINTN2 or USBINTN3 x
USBINTN2 or USBINTN3 x
⎯
⎯
Section 16 USB Function Module (USB)
Page 987 of 1392
DMAC
Activation
(DREQ0)
(DREQ1)
⎯
⎯