R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 613

MCU 128KKB FLASH 48K 144-LQFP

R4F24568NVFQV

Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of R4F24568NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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H8S/2456, H8S/2456R, H8S/2454 Group
10.6.4
P6ODR specifies the output type of each port 6 pin.
10.6.5
Port 6 pins also function as 8-bit timer I/Os, interrupt inputs, and DMAC I/Os. The
correspondence between the register specification and the pin functions is shown below.
• P65/IRQ13-A/DACK1/TMO1-A
Notes: 1. IRQ13-A input when the ITS13 bit in ITSR is 0.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
SAE1
OS3 to OS0
P65DDR
Pin function
Bit
7, 6
5
4
3
2
1
0
The pin function is switched as shown below according to the combination of bit SAE1 in
DMABCRH of DMAC, bits OS3 to OS0 in TCSR_1 of the 8-bit timer, bit TMRS in PFCR3,
bit P65DDR, and bit ITS13 in ITSR of the interrupt controller.
Bit Name
P65ODR
P64ODR
P63ODR
P62ODR
P61ODR
P60ODR
2. TMO1-A output when the TMRS bit in PFCR3 is 0.
Port 6 Open Drain Control Register (P6ODR)
Pin Functions
Initial Value
All 0
0
0
0
0
0
0
P65 input
0
All 0
P65 output
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
0
IRQ13-A interrupt input*
Description
Reserved
These bits are always read as 0. Only the initial
values should be written to these bits.
Setting a P6ODR bit to 1 makes the corresponding
pin an NMOS open-drain output pin, while clearing
a P6ODR bit to 0 makes the corresponding pin a
CMOS output pin.
TMO1-A output*
Not all 0
2
1
DACK1 output
Section 10 I/O Ports
1
Page 583 of 1392

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