R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1155
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R4F24568NVFQV
Manufacturer:
REA
Quantity:
15
Company:
Part Number:
R4F24568NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Figure 20.7 (2) Example of Reception Operation (SSU Mode) When 16-bit data length is
selected (SSRDR0, SSRDR1, and SSRDR2 are valid) with CPOS = 0 and CPHS = 0 (3)
Figure 20.7 Example of Reception Operation (SSU Mode) When 24-bit data length is
selected (SSRDR0 and SSRDR1 are valid) with CPOS = 0 and CPHS = 0
User operation
LSI operation
User operation
(MSB first)
LSI operation
(LSB first)
(MSB first)
(LSB first)
SSCK
RDRF
SCS
SSI
SSI
SSCK
RDRF
SCS
SSO
SSI
Dummy-read SSRDR0,
SSRDR1, and SSRDR2
Dummy-read SSRDR0 and SSRDR1
Bit
Bit
Bit
Bit
7
0
0
7
Bit
Bit
Bit
Bit
6
1
1
6
SSRDR2
SSRDR0
Bit
Bit
to
to
5
2
SSRDR1
SSRDR0
Bit
Bit
Bit
Bit
4
6
1
3
Bit
Bit
Bit
Bit
3
7
0
4
Bit
Bit
Bit
Bit
2
0
7
5
1 frame
Bit
Bit
Bit
Bit
1
6
1
6
Section 20 Synchronous Serial Communication Unit (SSU)
SSRDR1
SSRDR1
1 frame
Bit
Bit
0
to
to
7
Bit
Bit
Bit
Bit
6
1
0
7
Bit
Bit
Bit
Bit
7
0
1
6
Bit
Bit
Bit
Bit
2
5
0
7
SSRDR1
SSRDR0
Bit
Bit
Bit
Bit
3
4
1
6
SSRDR0
SSRDR2
Bit
Bit
to
to
4
3
Bit
Bit
Bit
Bit
5
2
6
1
RXI interrupt
generated
RXI interrupt
Bit
Bit
Bit
Bit
7
0
6
1
generated
Bit
Bit
7
0
Page 1125 of 1392
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