R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1061

• Manufacturer Part Number: R4F24568NVFQV
• Description: MCU 128KKB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
17.3.4
ICIER is an 8-bit readable/writable register that enables or disables interrupt sources and
acknowledge bits, sets acknowledge bits to be transferred, and confirms acknowledge bits to be
received.
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Bit
7
6
5
Bit Name
TIE
TEIE
RIE
I
2
C Bus Interrupt Enable Register (ICIER)
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Description
Transmit Interrupt Enable
When the TDRE bit in ICSR is set to 1, this bit
enables or disables the transmit data empty
interrupt (TXI).
0: Transmit data empty interrupt request (TXI) is
1: Transmit data empty interrupt request (TXI) is
Transmit End Interrupt Enable
This bit enables or disables the transmit end
interrupt (TEI) at the rising of the ninth clock while
the TDRE bit in ICSR is 1. TEI can be canceled by
clearing the TEND bit or the TEIE bit to 0.
0: Transmit end interrupt request (TEI) is disabled.
1: Transmit end interrupt request (TEI) is enabled.
Receive Interrupt Enable
This bit enables or disables the receive data full
interrupt request (RXI) when a received data is
transferred from ICDRS to ICDRR and the RDRF
bit in ICSR is set to 1. RXI can be canceled by
clearing the RDRF or RIE bit to 0.
0: Receive data full interrupt request (RXI) is
1: Receive data full interrupt request (RXI) is
disabled.
enabled.
disabled.
enabled.
Section 17 I2C Bus Interface 2 (IIC2)
Page 1031 of 1392