R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 34
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Quantity
Price
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Section 1 Overview
Page 4 of 1392
Type
DMA
External
bus
extension
Module/
Function
DMA controller
(DMAC)
EXDMA controller
(EXDMAC)
Data transfer
controller (DTC)
Bus controller
(BSC)
Description
•
•
•
•
•
•
•
•
•
•
•
Note: EXDMAC is supported only by the H8S/2456 Group and
•
•
•
•
•
•
•
•
•
Note * Supported only by the H8S/2456R Group.
DMA transfer is possible on four channels
Three activation sources (auto-request, on-chip module
interrupt, and external request)
Byte or word can be set as the transfer unit
Short address mode or full address mode can be selected
16-Mbyte address space can be specified directly
DMA transfer is possible on two channels
Two activation sources (auto-request and external request)
Two transfer modes (normal mode and block transfer mode)
Dual address mode or single address mode can be selected
16-Mbyte address space can be specified directly
Repeat area can be set
Transfer is possible on any number of channels
An interrupt source can trigger data transfer (chain transfer is
possible)
Three transfer modes (normal mode, repeat mode, and block
transfer mode)
Byte or word can be set as the transfer unit
Activation by software is possible
External address space: 16 Mbytes
Manages the external address space divided into eight areas
Chip select signals (CS0 to CS7) can be output
8-bit access or 16-bit access can be selected
2-state access or 3-state access can be selected
Program wait states can be inserted
External memory interfaces (burst ROM, DRAM, synchronous
DRAM*, address/data multiplexed I/O)
Bus arbitration function (bus arbitration of the bus masters
CPU, DTC, DMAC, and EXDMAC)
H8S/2456R Group.
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
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