R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1034
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 16 USB Function Module (USB)
16.5.6
•
EP1 has two 64-byte FIFOs, but the user can receive data and read receive data without being
aware of this dual-FIFO configuration.
When one FIFO is full after reception is completed, the EP1 FULL bit in IFR2 is set. After the
first receive operation into one of the FIFOs when both FIFOs are empty, the other FIFO is empty,
and so the next packet can be received immediately. When both FIFOs are full, NAK is returned
to the host automatically. When reading of the receive data is completed following data reception,
1 is written to the EP1 RDFN bit in TRG1. This operation empties the FIFO that has just been
read, and makes it ready to receive the next packet.
Page 1004 of 1392
Dual FIFOs (EP1)
EP1 Bulk-Out Transfer
Clear EP1 FIFO full status.
(IFR2.EP1 FULL = 0)
Data reception from host
Set EP1 FIFO full status.
(IFR2.EP1 FULL = 1)
OUT token reception
in EP1 FIFO?
USB function
Figure 16.16 EP1 Bulk-Out Transfer Operation
Space
Yes
Yes
ACK
NAK
No
No
Interrupt
request
Interrupt request
Read EP1 receive data
size register (EPSZ1).
Write 1 to EP1 read
complete bit.
(TRG1.EP1 RDFN = 1)
Read data from EP1
data register (EPDR1).
Application
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
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