HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 739

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

SSR⎯Serial Status Register
Initial value
Note: * Only 0 can be written, to clear the flag.
Read/Write
Bit
Transmit data register empty
R/(W)*
TDRE
0
1
7
1
[Setting conditions]
[Clearing conditions] • Read TDRE when TDRE = 1, then write 0 in TDRE.
Receive data register full
R/(W)*
RDRF
0
1
6
0
[Clearing conditions] • Reset or transition to standby mode
[Setting condition]
Overrun error
0
1
[Clearing conditions] • Reset or transition to standby mode
[Setting condition]
R/(W)*
ORER
5
0
• The DMAC writes data in TDR.
• Reset or transition to standby mode
• TE is 0 in SCR.
• Data is transferred from TDR to TSR, enabling new data to be written in TDR
Framing error (for serial communication interface)
Error signal status (for smart card interface)
FER/ERS
R/(W)*
0
1
0
1
4
0
• Read RDRF when RDRF = 1, then write 0 in RDRF.
• The DMAC reads data from RDR.
Serial data is received normally and transferred from RSR to RDR.
[Clearing conditions] • Reset or transition to standby mode
[Setting condition]
[Clearing conditions] • Reset or transition to standby mode
[Setting condition]
Parity error
0
1
• Read ORER when ORER = 1, then write 0 in ORER.
Overrun error (reception of the next serial data ends when RDRF = 1)
R/(W)*
[Clearing conditions] • Reset or transition to standby mode
[Setting condition]
PER
3
0
Transmit end (for serial communication interface)
Transmit end (for smart card interface)
Note: * etu: Elementary time unit (time required to transmit one bit)
0
1
0
1
TEND
H'FFFB4
• Read FER when FER = 1, then write 0 in FER.
Framing error (stop bit is 0)
• Read ERS when ERS = 1, then write 0 in ERS.
A low error signal is received.
R
2
1
[Clearing conditions]
• Read TDRE when TDRE = 1, then write 0 in TDRE.
• The DMAC writes data in TDR.
[Setting conditions]
• Reset or transition to standby mode
• TE is cleared to 0 in SCR.
• TDRE is 1 when last bit of 1-byte serial character is
[Clearing conditions]
• Read TDRE when TDRE = 1, then write 0 in TDRE.
• The DMAC writes data in TDR.
[Setting conditions]
• Reset or transition to standby mode
• TE is cleared to 0 in SCR and FER/ERS is cleared to 0.
• TDRE is 1 and FER/ERS is 0 (normal transmission)
transmitted.
2.5 etu* (when GM = 0) or 1.0 etu (when GM = 1) after
1-byte serial character is transmitted.
Rev.5.00 Sep. 12, 2007 Page 709 of 764
• Read PER when PER = 1, then write 0 in PER.
Parity error (parity of receive data does not match parity
setting of O/E bit in SMR)
MPB
Multiprocessor bit
R
1
0
0
1
Multiprocessor bit transfer
Multiprocessor bit value in receive data is 0
Multiprocessor bit value in receive data is 1
Appendix B Internal I/O Registers
0
1
Multiprocessor bit value in transmit data is 0
Multiprocessor bit value in transmit data is 1
MPBT
R/W
0
0
REJ09B0396-0500
SCI0