HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 425

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
11.2.5
NDRA is an 8-bit readable/writable register that stores the next output data for TPC output groups
1 and 0 (pins TP
specified in TPCR occurs, NDRA contents are transferred to the corresponding bits in PADR. The
address of NDRA differs depending on whether TPC output groups 0 and 1 have the same output
trigger or different output triggers.
NDRA is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Same Trigger for TPC Output Groups 0 and 1: If TPC output groups 0 and 1 are triggered by
the same compare match event, the NDRA address is H'FFFA5. The upper 4 bits belong to group
1 and the lower 4 bits to group 0. Address H'FFFA7 consists entirely of reserved bits that cannot
be modified and always read 1.
Address H'FFFA5
Bit
Initial value
Read/Write
Address H'FFFA7
Bit
Initial value
Read/Write
Next Data Register A (NDRA)
7
NDR7
R/W
to TP
7
0
7
1
Next data 7 to 4
These bits store the next output
data for TPC output group 1
0
). During TPC output, when an 16-bit timer compare match event
NDR6
R/W
6
0
6
1
NDR5
R/W
5
0
5
1
NDR4
11. Programmable Timing Pattern Controller (TPC)
Reserved bits
R/W
4
0
4
1
NDR3
Rev.5.00 Sep. 12, 2007 Page 395 of 764
R/W
3
0
3
1
Next data 3 to 0
These bits store the next output
data for TPC output group 0
NDR2
R/W
2
0
2
1
NDR1
R/W
1
0
1
1
REJ09B0396-0500
NDR0
R/W
0
0
0
1

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