HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 433

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

The output trigger period of a non-overlapping TPC output waveform is set in general register B
(GRB) in the 16-bit timer channel selected for output triggering. The non-overlap margin is set in
general register A (GRA). The output values change at compare match A and B. For details see
section 11.3.4, Non-Overlapping TPC Output.
TPMR is initialized to H'F0 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 4⎯Reserved: These bits cannot be modified and are always read as 1.
Bit 3⎯Group 3 Non-Overlap (G3NOV): Selects normal or non-overlapping TPC output for
group 3 (TP
Bit 2⎯Group 2 Non-Overlap (G2NOV): Selects normal or non-overlapping TPC output for
group 2 (TP
Bit 1⎯Group 1 Non-Overlap (G1NOV): Selects normal or non-overlapping TPC output for
group 1 (TP
Bit 3
G3NOV
0
1
Bit 2
G2NOV
0
1
Bit 1
G1NOV
0
1
15
11
7
Description
Normal TPC output in group 3 (output values change at
compare match A in the selected 16-bit timer channel)
Non-overlapping TPC output in group 3 (independent 1 and 0 output at
compare match A and B in the selected 16-bit timer channel)
Description
Normal TPC output in group 2 (output values change at
compare match A in the selected 16-bit timer channel)
Non-overlapping TPC output in group 2 (independent 1 and 0 output at
compare match A and B in the selected 16-bit timer channel)
Description
Normal TPC output in group 1 (output values change at
compare match A in the selected 16-bit timer channel)
Non-overlapping TPC output in group 1 (independent 1 and 0 output at
compare match A and B in the selected 16-bit timer channel)
to TP
to TP
to TP
4
12
8
).
).
).
11. Programmable Timing Pattern Controller (TPC)
Rev.5.00 Sep. 12, 2007 Page 403 of 764
REJ09B0396-0500
(Initial value)
(Initial value)
(Initial value)