HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 237

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

7.4
7.4.1
Table 7.5 summarizes the DMAC modes.
Table 7.5
Transfer Mode
Short address
mode
Full address
mode
A summary of operations in these modes follows.
I/O Mode: One byte or word is transferred per request. A designated number of these transfers are
executed. A CPU interrupt can be requested at completion of the designated number of transfers.
One 24-bit address and one 8-bit address are specified. The transfer direction is determined
automatically from the activation source.
Idle Mode: One byte or word is transferred per request. A designated number of these transfers
are executed. A CPU interrupt can be requested at completion of the designated number of
transfers. One 24-bit address and one 8-bit address are specified. The addresses are held fixed. The
transfer direction is determined automatically from the activation source.
Operation
Overview
DMAC Modes
I/O mode
Idle mode
Repeat mode
Normal mode
Block transfer mode
Activation
Compare match/input
capture A interrupt from
16-bit timer channels 0 to 2
Transmit-data-empty
and receive-data-full
interrupts from SCI
channel 0
Conversion-end interrupt
from A/D converter
External request
Auto-request
External request
Compare match/input
capture A interrupt from
ITU channels 0 to 2
Conversion-end interrupt
from A/D converter
External request
Rev.5.00 Sep. 12, 2007 Page 207 of 764
Notes
•
•
•
•
Up to four channels
can operate
independently
Only the B channels
support external requests
A and B channels are
paired; up to two
channels are available
Burst mode transfer or
cycle-steal mode transfer
can be selected for
autorequests.
7. DMA Controller
REJ09B0396-0500