HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 26

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

13.3 Operation .......................................................................................................................... 454
13.4 SCI Interrupts.................................................................................................................... 481
13.5 Usage Notes ...................................................................................................................... 482
Section 14 Smart Card Interface
14.1 Overview........................................................................................................................... 487
14.2 Register Descriptions ........................................................................................................ 490
14.3 Operation .......................................................................................................................... 495
14.4 Usage Notes ...................................................................................................................... 509
Section 15 A/D Converter
15.1 Overview........................................................................................................................... 513
15.2 Register Descriptions ........................................................................................................ 516
Rev.5.00 Sep. 12, 2007 Page xxiv of xxviii
REJ09B0396-0500
13.2.6 Serial Control Register (SCR).............................................................................. 436
13.2.7 Serial Status Register (SSR) ................................................................................ 441
13.2.8 Bit Rate Register (BRR) ...................................................................................... 446
13.3.1 Overview.............................................................................................................. 454
13.3.2 Operation in Asynchronous Mode ....................................................................... 457
13.3.3 Multiprocessor Communication........................................................................... 466
13.3.4 Synchronous Operation........................................................................................ 473
13.5.1 Notes on Use of SCI ............................................................................................ 482
14.1.1 Features................................................................................................................ 487
14.1.2 Block Diagram..................................................................................................... 488
14.1.3 Pin Configuration................................................................................................. 488
14.1.4 Register Configuration......................................................................................... 489
14.2.1 Smart Card Mode Register (SCMR) .................................................................... 490
14.2.2 Serial Status Register (SSR) ................................................................................ 492
14.2.3 Serial Mode Register (SMR) ............................................................................... 494
14.2.4 Serial Control Register (SCR).............................................................................. 494
14.3.1 Overview.............................................................................................................. 495
14.3.2 Pin Connections ................................................................................................... 495
14.3.3 Data Format ......................................................................................................... 496
14.3.4 Register Settings .................................................................................................. 498
14.3.5 Clock.................................................................................................................... 499
14.3.6 Transmitting and Receiving Data ........................................................................ 501
15.1.1 Features................................................................................................................ 513
15.1.2 Block Diagram..................................................................................................... 514
15.1.3 Pin Configuration................................................................................................. 515
15.1.4 Register Configuration......................................................................................... 516
15.2.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 516
................................................................................................. 513
..................................................................................... 487