HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 726

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Appendix B Internal I/O Registers
8TCSR2⎯Timer Control/Status Register 2
8TCSR3⎯Timer Control/Status Register 3
Rev.5.00 Sep. 12, 2007 Page 696 of 764
REJ09B0396-0500
8TCSR2
8TCSR3
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
Initial value
Read/Write
Initial value
Read/Write
Bit
Bit
Compare match/input capture flag B
0
1
R/(W)*
R/(W)*
CMFB
CMFB
[Clearing condition]
Read CMFB when CMFB = 1, then write 0 in CMFB.
[Setting conditions]
• 8TCNT = TCORB
• The 8TCNT value is transferred to TCORB by an input capture signal when
7
0
7
0
TCORB functions as an input capture register.
Compare match/input capture flag A
0
1
R/(W)*
R/(W)*
CMFA
CMFA
[Setting condition]
8TCNT = TCORA
6
0
6
0
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA.
Timer overflow flag
0
1
R/(W)*
R/(W)*
OVF
OVF
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF.
[Setting condition]
8TCNT overflows from H'FF to H'00.
5
0
5
0
Input capture enable
0
1
R/W
ICE
⎯
⎯
4
1
4
0
TCORB is a compare match register
TCORB is an input capture register
Output/input capture edge select B3 and B2
8TCSR3
ICE in
H'FFF92
H'FFF93
0
1
OIS3
OIS3
R/W
R/W
3
0
3
0
Bit 3
OIS3
0
1
0
1
Bit 1
OS1
Output select A1 and A0
OIS2
OIS2
R/W
R/W
0
1
2
0
2
0
Bit 2
OIS2
0
1
0
1
0
1
0
1
Bit 0
OS0
0
1
0
1
No change at compare match B
0 output at compare match B
1 output at compare match B
Output toggles at compare match
B
TCORB input capture on rising
edge
TCORB input capture on falling
edge
TCORB input capture on both
rising and falling edges
OS1
R/W
OS1
R/W
No change at compare match A
0 output at compare match A
1 output at compare match A
Output toggles at compare
match A
1
0
1
0
Description
OS0
R/W
OS0
R/W
Description
0
0
0
0
8-bit timer channel 2
8-bit timer channel 3