HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 475

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
For serial communication interface (SMIF bit in SCMR cleared to 0): Indicates that when the
last bit of a serial character was transmitted TDR did not contain valid transmit data, so
transmission has ended. The TEND flag is a read-only bit and cannot be written.
Bit 2
TEND
0
1
For smart card interface (SMIF bit in SCMR set to 1): Indicates that when the last bit of a
serial character was transmitted TDR did not contain valid transmit data, so transmission has
ended. The TEND flag is a read-only bit and cannot be written.
Bit 2
TEND
0
1
Note: etu: Elementary time unit (time required to transmit one bit)
Description
Transmission is in progress
[Clearing conditions]
End of transmission
[Setting conditions]
Description
Transmission is in progress
[Clearing conditions]
End of transmission
[Setting conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE
The DMAC writes data in TDR
The chip is reset or enters standby mode
The TE bit in SCR is cleared to 0
TDRE is 1 when the last bit of a 1-byte serial transmit character is
transmitted
Read TDRE when TDRE = 1, then write 0 in TDRE
The DMAC writes data in TDR
The chip is reset or enters standby mode
The TE bit is cleared to 0 in SCR and the FER/ERS bit is also cleared to 0
TDRE is 1 and FER/ERS is 0 (normal transmission) 2.5 etu (when GM = 0)
or 1.0 etu (when GM = 1) after a 1-byte serial character is transmitted
Rev.5.00 Sep. 12, 2007 Page 445 of 764
13. Serial Communication Interface
REJ09B0396-0500
(Initial value)
(Initial value)

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