HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 406

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

10. 8-Bit Timers
Note: When TCORB1 in channel 1 is used for input capture, TCORB0 in channel 0 cannot be
Setting Input Capture Operation in 16-Bit Count Mode
• Channels 0 and 1:
• Channels 2 and 3:
10.5
10.5.1
The 8-bit timer unit can generate three types of interrupt: compare match A and B (CMIA and
CMIB) and overflow (OVI). Table 10.5 shows the interrupt sources and their priority order. Each
interrupt source is enabled or disabled by the corresponding interrupt enable bit in 8TCR. A
separate interrupt request signal is sent to the interrupt controller by each interrupt source.
Table 10.5 Types of 8-Bit Timer Interrupt Sources and Priority Order
Interrupt Source
CMIA
CMIB
TOVI
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⎯ Select the input clock with bits CKS2 to CKS0 in 8TCR3, and start the 8TCNT count.
⎯ In 16-bit count mode, TCORB0 and TCORB1 function as a 16-bit input capture register
⎯ Select rising edge, falling edge, or both edges as the input edge(s) for the input capture
⎯ Select the input clock with bits CKS2 to CKS0 in 8TCR1, and start the 8TCNT count.
⎯ In 16-bit count mode, TCORB2 and TCORB3 function as a 16-bit input capture register
⎯ Select rising edge, falling edge, or both edges as the input edge(s) for the input capture
⎯ Select the input clock with bits CKS2 to CKS0 in 8TCR3, and start the 8TCNT count.
when the ICE bit is set to 1 in 8TCSR1.
signal (TMIO
bits OIS3 and OIS2 in 8TCSR1 are ignored.)
when the ICE bit is set to 1 in 8TCSR3.
signal (TMIO
bits OIS3 and OIS2 in 8TCSR3 are ignored.)
used as a compare match register.
Similarly, when TCORB3 in channel 3 is used for input capture, TCORB2 in channel 2
cannot be used as a compare match register.
Interrupt
Interrupt Source
1
3
) with bits OIS3 and OIS2 in 8TCSR0. (In 16-bit count mode, the settings of
) with bits OIS3 and OIS2 in 8TCSR2. (In 16-bit count mode, the settings of
Description
Interrupt by CMFA
Interrupt by CMFB
Interrupt by OVF
Priority
High
Low