HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 712

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Appendix B Internal I/O Registers
TISRB⎯Timer Interrupt Status Register B
Rev.5.00 Sep. 12, 2007 Page 682 of 764
REJ09B0396-0500
Initial value
Read/Write
Note: * Only 0 can be written, to clear the flag.
Bit
⎯
⎯
7
1
IMIEB2
R/W
Input capture/compare match interrupt enable B2
6
0
0
1
IMIB2 interrupt requested by IMFB2 flag is disabled
IMIB2 interrupt requested by IMFB2 flag is enabled
IMIEB1
R/W
Input capture/compare match interrupt enable B1
5
0
0
1
IMIB1 interrupt requested by IMFB1 flag is disabled
IMIB1 interrupt requested by IMFB1 flag is enabled
IMIEB0
R/W
Input capture/compare match interrupt enable B0
4
0
0
1
Input capture/compare match flag B2
IMIB0 interrupt requested by IMFB0 flag is disabled
IMIB0 interrupt requested by IMFB0 flag is enabled
0
1
⎯
⎯
3
1
Input capture/compare match flag B1
[Clearing condition]
Read IMFB2 when IMFB2 =1, then write 0 in IMFB2
[Setting conditions]
• 16TCNT2 = GRB2 when GRB2 functions as an output
• 16TCNT2 value is transferred to GRB2 by an input capture
0
1
compare register
signal when GRB2 functions as an input capture register
Input capture/compare match flag B0
R/(W)*
IMFB2
0
1
[Clearing condition]
Read IMFB1 when IMFB1 =1, then write 0 in IMFB1
[Setting conditions]
• 16TCNT1 = GRB1 when GRB1 functions as an output
• 16TCNT1 value is transferred to GRB1 by an input capture
2
0
H'FFF65
compare register
signal when GRB1 functions as an input capture register
[Clearing condition]
Read IMFB0 when IMFB0 =1, then write 0 in IMFB0
[Setting conditions]
• 16TCNT0 = GRB0 when GRB0 functions as an
• 16TCNT0 value is transferred to GRB0 by an input
output compare register.
capture signal when GRB0 functions as an input
capture register.
R/(W)*
IMFB1
1
0
R/(W)*
IMFB0
0
0
(Initial value)
16-Bit Timer (Common)
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)