HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 326

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
9. 16-Bit Timer
In phase counting mode channel 2 operates as above regardless of the external clock edges
selected by bits CKEG1 and CKEG0 and the clock source selected by bits TPSC2 to TPSC0.
Phase counting mode takes precedence over these settings.
The counter clearing condition selected by the CCLR1 and CCLR0 bits in 16TCR2 and the
compare match/input capture settings and interrupt functions of TIOR2, TISRA, TISRB, TISRC
remain effective in phase counting mode.
Bit 5⎯Flag Direction (FDIR): Designates the setting condition for the OVF flag in TISRC. The
FDIR designation is valid in all modes in channel 2.
Bit 5
FDIR
0
1
Bits 4 and 3⎯Reserved: These bits cannot be modified and are always read as 1.
Bit 2⎯PWM Mode 2 (PWM2): Selects whether channel 2 operates normally or in PWM mode.
Bit 2
PWM2
0
1
When bit PWM2 is set to 1 to select PWM mode, pin TIOCA
output goes to 1 at compare match with GRA2, and to 0 at compare match with GRB2.
Bit 1⎯PWM Mode 1 (PWM1): Selects whether channel 1 operates normally or in PWM mode.
Bit 1
PWM1
0
1
When bit PWM1 is set to 1 to select PWM mode, pin TIOCA
output goes to 1 at compare match with GRA1, and to 0 at compare match with GRB1.
Rev.5.00 Sep. 12, 2007 Page 296 of 764
REJ09B0396-0500
Description
OVF is set to 1 in TISRC when 16TCNT2 overflows or underflows
OVF is set to 1 in TISRC when 16TCNT2 overflows
Description
Channel 2 operates normally
Channel 2 operates in PWM mode
Description
Channel 1 operates normally
Channel 1 operates in PWM mode
2
1
becomes a PWM output pin. The
becomes a PWM output pin. The
(Initial value)
(Initial value)
(Initial value)

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