HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 33

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Feature
Bus controller
DMA controller
(DMAC)
16-bit timer,
3 channels
Description
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Short address mode
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Full address mode
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Address space can be partitioned into eight areas, with independent bus
specifications in each area
Chip select output available for areas 0 to 7
8-bit access or 16-bit access selectable for each area
Two-state or three-state access selectable for each area
Selection of two wait modes
Number of program wait states selectable for each area
Direct connection of burst ROM
Direct connection of up to 8-Mbyte DRAM (or DRAM interface can be used
as interval timer)
Bus arbitration function
Maximum four channels available
Selection of I/O mode, idle mode, or repeat mode
Can be activated by compare match/input capture A interrupts from 16-bit
timer channels 0 to 2, conversion-end interrupts from the A/D converter,
transmit-data-empty and receive-data-full interrupts from the SCI, or external
requests
Maximum two channels available
Selection of normal mode or block transfer mode
Can be activated by compare match/input capture A interrupts from 16-bit
timer channels 0 to 2, conversion-end interrupts from the A/D converter,
external requests, or auto-request
Three 16-bit timer channels, capable of processing up to six pulse outputs or
six pulse inputs
16-bit timer counter (channels 0 to 2)
Two multiplexed output compare/input capture pins (channels 0 to 2)
Operation can be synchronized (channels 0 to 2)
PWM mode available (channels 0 to 2)
Phase counting mode available (channel 2)
DMAC can be activated by compare match/input capture A interrupts
(channels 0 to 2)
Rev.5.00 Sep. 12, 2007 Page 3 of 764
REJ09B0396-0500
1. Overview