HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 11

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
Item
8.8.2 Register
Configuration
Port B Data Register
(PBDR):
Table 8.16 Port B Pin
Functions
PB
CS
PB
PB
CS
PB
9.1.4 Register
Configuration
Table 9.3 16-bit timer
Registers
3
2
1
0
4
6
/TP
/TP
/TP
/TP
11
10
9
8
/TMIO
/TMO
/TMIO
/TMO
0
2
1
/CS
3
/CS
/DREQ
/DREQ
7
5
0
1
/
/
Page
281
282
283
291
Revision (See Manual for Details)
Description amended
The DRAM interface settings by bits DRAS2 to DRAS0 in
DRCRA, bits OIS3/2 and OS1/0 in 8TCSR3, bits CCLR1 and
CCLR0 in 8TCR3, bit CS4E in CSCR, bit NDER11 in NDERB,
and bit PB
Table amended
Description amended
Bits OIS3/2 and OS1/0 in 8TCSR1, bits CCLR1 and CCLR0 in
8TCR0, bit CS6E in CSCR, bit NDER9 in NDERB, and bit
PB
Description amended
Bits OIS3/2 and OS1/0 in 8TCSR0, bit CS7E in CSCR, bit
NDER8 in NDERB, and bit PB
follows.
Table amended
Channel
Common
Pin
PB
TMO
1
2
/TP
DDR select the pin function as follows.
2
/CS
10
/
5
Pin Functions and Selection Method
The DRAM interface settings by bits DRAS2 to DRAS0 in DRCRA, bits OIS3/2 and
OS1/0 in 8TCSR2, bit CS5E in CSCR, bit NDER10 in NDERB, and bit PB
select the pin function as follows.
settings
OS1/0
Address*
H'FFF64
DRAM interface
OIS3/2 and
CS5E
PB
NDER10
Pin function
3
DDR select the pin function as follows.
2
DDR
1
Name
Timer interrupt status register A
input
PB
0
Rev.5.00 Sep. 12, 2007 Page ix of xxviii
2
output
PB
0
1
0
0
2
DDR select the pin function as
(1) in table below
All 0
output
TP
1
1
10
output
Abbre-
viation
TISRA
CS
1
5
REJ09B0396-0500
Not all 0
output
TMO
R/W
R/(W)*
2
2
DDR
output*
2
below
(2) in
table
CS
Initial
Value
H'88
5

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