HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 719

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

8TCR0⎯Timer Control Register 0
8TCR1⎯Timer Control Register 1
Initial value
Read/Write
Bit
CMIEB
Compare match interrupt enable B
R/W
0
1
7
0
CMIB interrupt requested by CMFB is disabled
CMIB interrupt requested by CMFB is enabled
CMIEA
Compare match interrupt enable A
R/W
0
1
6
0
CMIA interrupt requested by CMFA is disabled
CMIA interrupt requested by CMFA is enabled
Timer overflow interrupt enable
OVIE
R/W
0
1
5
0
OVI interrupt requested by OVF is disabled
OVI interrupt requested by OVF is enabled
Counter clear 1 and 0
CCLR1
0
1
R/W
4
0
0
1
0
1
CCLR0
Note: * If the clock input of channel 0 is the 8TCNT1
R/W
Clock select 2 to 0
Clearing is disabled
Cleared by compare match A
Cleared by compare match B/input capture B
Cleared by input capture B
3
0
0
1
H'FFF80
H'FFF81
overflow signal and that of channel 1 is the
8TCNT0 compare match signal, no
incrementing clock is generated. Do not use
this setting.
0
1
0
1
Rev.5.00 Sep. 12, 2007 Page 689 of 764
CKS2
R/W
2
0
0
1
0
1
0
1
0
1
Appendix B Internal I/O Registers
Internal clock, counted on rising
edge of φ/8
Internal clock, counted on rising
edge of φ/64
Internal clock, counted on rising
edge of φ/8192
Channel 0:
Channel 1:
External clock, counted on falling edge
External clock, counted on rising edge
External clock, counted on both
rising and falling edges
Clock input is disabled
Count on 8TCNT1 overflow signal*
Count on 8TCNT0 compare match
A*
CKS1
R/W
1
0
CKS0
R/W
0
0
8-bit timer channel 0
8-bit timer channel 1
REJ09B0396-0500