HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 22

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
Section 8 I/O Ports
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
Section 9 16-Bit Timer
9.1
9.2
Rev.5.00 Sep. 12, 2007 Page xx of xxviii
REJ09B0396-0500
7.6.5
7.6.6
7.6.7
7.6.8
7.6.9
Overview........................................................................................................................... 245
Port 4................................................................................................................................. 248
8.2.1
8.2.2
Port 6................................................................................................................................. 251
8.3.1
8.3.2
Port 7................................................................................................................................. 255
8.4.1
8.4.2
Port 8................................................................................................................................. 256
8.5.1
8.5.2
Port 9................................................................................................................................. 261
8.6.1
8.6.2
Port A................................................................................................................................ 265
8.7.1
8.7.2
Port B ................................................................................................................................ 277
8.8.1
8.8.2
Overview........................................................................................................................... 285
9.1.1
9.1.2
9.1.3
9.1.4
Register Descriptions ........................................................................................................ 292
9.2.1
9.2.2
9.2.3
Note on Activating DMAC by Internal Interrupts ............................................... 241
NMI Interrupts and Block Transfer Mode ........................................................... 242
Memory and I/O Address Register Values .......................................................... 242
Bus Cycle when Transfer Is Aborted ................................................................... 243
Transfer Requests by A/D Converter................................................................... 243
Overview.............................................................................................................. 248
Register Configuration......................................................................................... 249
Overview.............................................................................................................. 251
Register Configuration......................................................................................... 252
Overview.............................................................................................................. 255
Register Configuration......................................................................................... 255
Overview.............................................................................................................. 256
Register Configuration......................................................................................... 257
Overview.............................................................................................................. 261
Register Configuration......................................................................................... 262
Overview.............................................................................................................. 265
Register Configuration......................................................................................... 267
Overview.............................................................................................................. 277
Register Configuration......................................................................................... 278
Features................................................................................................................ 285
Block Diagrams ................................................................................................... 287
Pin Configuration................................................................................................. 290
Register Configuration......................................................................................... 291
Timer Start Register (TSTR) ............................................................................... 292
Timer Synchro Register (TSNC) ......................................................................... 293
Timer Mode Register (TMDR) ............................................................................ 295
.............................................................................................................. 245
....................................................................................................... 285

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