HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 507

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
• Receiving Serial Data (Synchronous Mode): Figure 13.18 shows a sample flowchart for
receiving serial data and indicates the procedure to follow. When switching from asynchronous
to synchronous mode, make sure that the ORER, PER, and FER flags are cleared to 0. If the
FER or PER flag is set to 1 the RDRF flag will not be set and both transmitting and receiving
will be disabled.
No
No
Clear RE bit to 0 in SCR
Read ORER flag in SSR
Read RDRF flag in SSR
Read receive data from
RDR, and clear RDRF
Finished receiving?
flag to 0 in SSR
Start receiving
ORER = 1
RDRF = 1
Initialize
<End>
Figure 13.18 Sample Flowchart for Serial Receiving (1)
No
Yes
Yes
(continued on next page)
Error handling
Yes
(5)
(1)
(2)
(4)
(3)
(1)
(2)(3)
(4)
(5)
Rev.5.00 Sep. 12, 2007 Page 477 of 764
SCI initialization: the receive data
input function of the RxD pin is
selected automatically.
Receive error handling: if a receive
error occurs, read the ORER flag in
SSR, then after executing the
necessary error handling, clear the
ORER flag to 0. Neither transmitting
nor receiving can resume while the
ORER flag remains set to 1.
SCI status check and receive data
read: read SSR, check that the RDRF
flag is set to 1, then read receive data
from RDR and clear the RDRF flag to
0. Notification that the RDRF flag
has changed from 0 to 1 can also be
given by the RXI interrupt.
To continue receiving serial data:
check the RDRF flag, read RDR, and
clear the RDRF flag to 0 before the
MSB (bit 7) of the current frame is
received. When the DMAC is
activated by a receive-data-full
interrupt request (RXI) to read RDR,
the RDRF flag is cleared
automatically.
13. Serial Communication Interface
REJ09B0396-0500

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