HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 123

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
Figure 5.3 shows the timing of the setting of the interrupt flags (IRQnF).
Interrupts IRQ
whether the corresponding pin is set for input or output. When using a pin for external interrupt
input, clear its DDR bit to 0 and do not use the pin for chip select output, refresh output, SCI
input/output, or A/D external trigger input.
5.3.2
Thirty-Six internal interrupts are requested from the on-chip supporting modules.
• Each on-chip supporting module has status flags for indicating interrupt status, and enable bits
• Interrupt priority levels can be assigned in IPRA and IPRB.
• 16-bit timer, SCI, and A/D converter interrupt requests can activate the DMAC, in which case
5.3.3
Table 5.3 lists the interrupt sources, their vector addresses, and their default priority order. In the
default priority order, smaller vector numbers have higher priority. The priority of interrupts other
than NMI can be changed in IPRA and IPRB. The priority order after a reset is the default order
shown in table 5.3.
for enabling or disabling interrupts.
no interrupt request is sent to the interrupt controller, and the I and UI bits are disregarded.
φ
IRQn
input pin
IRQnF
Note: n = 5 to 0
Internal Interrupts
Interrupt Vector Table
0
to IRQ
5
have vector numbers 12 to 17. These interrupts are detected regardless of
Figure 5.3 Timing of Setting of IRQnF
Rev.5.00 Sep. 12, 2007 Page 93 of 764
5. Interrupt Controller
REJ09B0396-0500

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