HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 328

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

9. 16-Bit Timer
Bit 6⎯Input Capture/Compare Match Interrupt Enable A2 (IMIEA2): Enables or disables
the interrupt requested by the IMFA2 flag when IMFA2 is set to 1.
Bit 6
IMIEA2
0
1
Bit 5⎯Input Capture/Compare Match Interrupt Enable A1 (IMIEA1): Enables or disables
the interrupt requested by the IMFA1 flag when IMFA1 is set to 1.
Bit 5
IMIEA1
0
1
Bit 4⎯Input Capture/Compare Match Interrupt Enable A0 (IMIEA0): Enables or disables
the interrupt requested by the IMFA0 flag when IMFA0 is set to 1.
Bit 4
IMIEA0
0
1
Bit 3⎯Reserved: This bit cannot be modified and is always read as 1.
Bit 2⎯Input Capture/Compare Match Flag A2 (IMFA2): This status flag indicates GRA2
compare match or input capture events.
Bit 2
IMFA2
0
1
Rev.5.00 Sep. 12, 2007 Page 298 of 764
REJ09B0396-0500
Description
IMIA2 interrupt requested by IMFA2 flag is disabled
IMIA2 interrupt requested by IMFA2 flag is enabled
Description
IMIA1 interrupt requested by IMFA1 flag is disabled
IMIA1 interrupt requested by IMFA1 flag is enabled
Description
IMIA0 interrupt requested by IMFA0 flag is disabled
IMIA0 interrupt requested by IMFA0 flag is enabled
Description
[Clearing conditions]
•
•
[Setting conditions]
•
•
Read IMFA2 when IMFA2 =1, then write 0 in IMFA2.
DMAC activated by IMIA2 interrupt.
16TCNT2 = GRA2 when GRA2 functions as an output compare register.
16TCNT2 value is transferred to GRA2 by an input capture signal when GRA2
functions as an input capture register.
(Initial value)
(Initial value)
(Initial value)
(Initial value)