HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 589

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

19.2.2
MSTCRH is an 8-bit readable/writable register that controls output of the system clock (φ). It also
controls the module standby function, which places individual on-chip supporting modules in the
standby state. Module standby can be designated for the SCI0, SCI1, SCI2.
Bit
Initial value
Read/Write
MSTCRH is initialized to H'78 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—φ Clock Stop (PSTOP): Enables or disables output of the system clock (φ).
Bit 1
PSTOP
0
1
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bit 2—Module Standby H2 (MSTPH2): Selects whether to place the SCI2 in standby.
Bit 2
MSTPH2
0
1
Module Standby Control Register H (MSTCRH)
Description
System clock output is enabled
System clock output is disabled
Description
SCI2 operates normally
SCI2 is in standby state
PSTOP
φ clock stop
Enables or disables
output of the system clock
R/W
7
0
⎯
⎯
6
1
Reserved bit
⎯
⎯
5
1
⎯
⎯
4
1
Rev.5.00 Sep. 12, 2007 Page 559 of 764
⎯
⎯
3
1
MSTPH2
Module standby H2 to 0
These bits select modules
to be placed in standby
R/W
2
0
19. Power-Down State
MSTPH1
R/W
1
0
REJ09B0396-0500
(Initial value)
(Initial value)
MSTPH0
R/W
0
0