HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 424

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

11. Programmable Timing Pattern Controller (TPC)
11.2.3
PBDDR is an 8-bit write-only register that selects input or output for each pin in port B.
Bit
Initial value
Read/Write
Port B is multiplexed with pins TP
be set to 1. For further information about PBDDR, see section 8.8, Port B.
11.2.4
PBDR is an 8-bit readable/writable register that stores TPC output data for groups 2 and 3, when
these TPC output groups are used.
Bit
Initial value
Read/Write
Note:
For further information about PBDR, see section 8.8, Port B.
Rev.5.00 Sep. 12, 2007 Page 394 of 764
REJ09B0396-0500
*
Bits selected for TPC output by NDERB settings become read-only bits.
Port B Data Direction Register (PBDDR)
Port B Data Register (PBDR)
PB DDR
R/(W)
PB
7
7
0
W
7
0
7
*
PB DDR
R/(W)
PB
6
0
6
W
6
0
6
*
15
PB DDR
R/(W)
to TP
PB
5
0
5
W
5
0
5
*
8
. Bits corresponding to pins used for TPC output must
Port B data 7 to 0
These bits store output data
for TPC output groups 2 and 3
Port B data direction 7 to 0
These bits select input or
output for port B pins
PB DDR
R/(W)
PB
4
0
4
W
4
0
4
*
R/(W)
PB DDR
PB
3
0
3
W
3
3
0
*
R/(W)
PB DDR
PB
2
0
2
W
2
2
0
*
R/(W)
PB DDR
PB
1
0
1
1
W
1
0
*
R/(W)
PB
PB DDR
0
0
0
0
W
*
0
0