HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 432

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
11. Programmable Timing Pattern Controller (TPC)
Bits 1 and 0⎯Group 0 Compare Match Select 1 and 0 (G0CMS1, G0CMS0): These bits
select the compare match event that triggers TPC output group 0 (TP
11.2.10 TPC Output Mode Register (TPMR)
TPMR is an 8-bit readable/writable register that selects normal or non-overlapping TPC output for
each group.
Bit
Initial value
Read/Write
Rev.5.00 Sep. 12, 2007 Page 402 of 764
REJ09B0396-0500
Bit 1
G0CMS1
0
1
Group 3 non-overlap
Selects non-overlapping TPC
output for group 3 (TP
Group 2 non-overlap
Selects non-overlapping TPC
output for group 2 (TP
Group 1 non-overlap
Selects non-overlapping TPC
output for group 1 (TP to TP )
Group 0 non-overlap
Selects non-overlapping TPC
output for group 0 (TP to TP )
1
Bit 0
G0CMS0
0
1
0
7
1
TPC output group 0 (TP
compare match in 16-bit timer channel 2
Description
TPC output group 0 (TP
timer channel 0
TPC output group 0 (TP
timer channel 1
TPC output group 0 (TP
timer channel 2
15
11
7
3
Reserved bits
6
1
to TP )
to TP )
4
0
12
8
5
1
4
1
3
3
3
3
to TP
to TP
to TP
to TP
G3NOV
0
0
0
0
) is triggered by
) is triggered by compare match in 16-bit
) is triggered by compare match in 16-bit
) is triggered by compare match in 16-bit
R/W
3
0
G2NOV
R/W
3
2
0
to TP
0
G1NOV
).
R/W
1
0
G0NOV
(Initial value)
R/W
0
0

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