HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 715

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
TIOR0⎯Timer I/O Control Register 0
16TCNT0H/L⎯Timer Counter 0H/L
Initial value
Read/Write
I/O control B2 to B0
IOB2
Bit 6
0
1
I/O control A2 to A0
Bit
IOA2
Bit 2
Initial value
Read/Write
0
1
R/W
IOB1
Bit 5
15
0
0
1
0
1
R/W
Bit
IOA1
14
Bit 1
0
0
1
0
1
IOB0
Bit 4
R/W
0
1
0
1
0
1
0
1
13
0
7
1
IOA0
Bit 0
R/W
0
1
0
1
0
1
0
1
12
GRB is output
compare register
GRB is input
capture register
0
IOB2
R/W
6
0
R/W
11
GRA is output
compare register
GRA is input
capture register
0
IOB1
R/W
5
0
R/W
10
0
R/W
IOB0
R/W
Pin output at compare match disabled (Initial value)
0 output at GRB compare match
1 output at GRB compare match
Toggle output at GRB compare match
(1 output on channel 2 only)
Input capture in GRB at rising edge
Input capture in GRB at falling edge
Input capture at both rising and falling edges
9
0
4
0
Up-counter
R/W
Pin output at compare match disabled (Initial value)
0 output at GRA compare match
1 output at GRA compare match
Toggle output at GRA compare match
(1 output on channel 2 only)
Input capture in GRA at rising edge
Input capture in GRA at falling edge
Input capture at both rising and falling edges
0
8
H'FFF69
H'FFF6A
H'FFF6B
3
1
Description
R/W
Rev.5.00 Sep. 12, 2007 Page 685 of 764
7
0
IOA2
Description
R/W
R/W
2
0
0
6
Appendix B Internal I/O Registers
R/W
IOA1
R/W
5
0
1
0
R/W
16-Bit Timer Channel 0
16-Bit Timer Channel 0
4
0
IOA0
R/W
0
0
R/W
0
3
REJ09B0396-0500
R/W
2
0
R/W
1
0
R/W
0
0

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