HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 151

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 0⎯WAIT Pin Enable (WAITE): Enables or disables wait insertion by means of the WAIT
pin.
Bit 0
WAITE
0
1
6.2.6
CSCR is an 8-bit readable/writable register that enables or disables output of chip select signals
(CS
If output of a chip select signal is enabled by a setting in this register, the corresponding pin
functions a chip select signal (CS
Bit
Initial value
Read/Write
CSCR is initialized to H'0F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 4⎯Chip Select 7 to 4 Enable (CS7E to CS4E): These bits enable or disable output of
the corresponding chip select signal.
Bit n
CSnE
0
1
Note: n = 7 to 4
Bits 3 to 0⎯Reserved: These bits cannot be modified and are always read as 1.
7
to CS
Chip Select Control Register (CSCR)
4
).
CS7E
R/W
7
0
Description
WAIT pin wait input is disabled, and the WAIT pin can be used as an
input/output port
WAIT pin wait input is enabled
Description
Output of chip select signal CSn is disabled
Output of chip select signal CSn is enabled
CS6E
R/W
6
0
Chip select 7 to 4 enable
These bits enable or disable
chip select signal output
7
to CS
CS5E
R/W
5
0
4
) output regardless of any other settings.
CS4E
R/W
4
0
Rev.5.00 Sep. 12, 2007 Page 121 of 764
⎯
⎯
3
1
⎯
⎯
2
1
Reserved bits
⎯
⎯
1
1
REJ09B0396-0500
6. Bus Controller
(Initial value)
(Initial value)
⎯
⎯
0
1