HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 18

• Manufacturer Part Number: HD6413007F20
• Description: IC H8 MCU ROMLESS 5V 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413007F20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

2.9
Section 3 MCU Operating Modes
3.1
3.2
3.3
3.4
3.5
3.6
Section 4 Exception Handling
4.1
4.2
4.3
4.4
4.5
4.6
Section 5 Interrupt Controller
5.1
Rev.5.00 Sep. 12, 2007 Page xvi of xxviii
REJ09B0396-0500
2.8.6
2.8.7
Basic Operational Timing ................................................................................................. 55
2.9.1
2.9.2
2.9.3
2.9.4
Overview........................................................................................................................... 59
3.1.1
3.1.2
Mode Control Register (MDCR) ...................................................................................... 60
System Control Register (SYSCR) ................................................................................... 61
Operating Mode Descriptions ........................................................................................... 63
3.4.1
3.4.2
3.4.3
3.4.4
Pin Functions in Each Operating Mode ............................................................................ 64
Memory Map in Each Operating Mode ............................................................................ 65
3.6.1
Overview........................................................................................................................... 69
4.1.1
4.1.2
4.1.3
Reset.................................................................................................................................. 72
4.2.1
4.2.2
4.2.3
Interrupts........................................................................................................................... 75
Trap Instruction................................................................................................................. 76
Stack Status after Exception Handling.............................................................................. 76
Notes on Stack Usage ....................................................................................................... 77
Overview........................................................................................................................... 79
5.1.1
Reset State ........................................................................................................... 54
Power-Down State ............................................................................................... 54
Overview.............................................................................................................. 55
On-Chip Memory Access Timing........................................................................ 55
On-Chip Supporting Module Access Timing ...................................................... 56
Access to External Address Space ....................................................................... 57
Operating Mode Selection ................................................................................... 59
Register Configuration......................................................................................... 60
Mode 1 ................................................................................................................. 63
Mode 2 ................................................................................................................. 63
Mode 3 ................................................................................................................. 64
Mode 4 ................................................................................................................. 64
Note on Reserved Areas....................................................................................... 65
Exception Handling Types and Priority............................................................... 69
Exception Handling Operation............................................................................. 69
Exception Vector Table ....................................................................................... 70
Overview.............................................................................................................. 72
Reset Sequence .................................................................................................... 72
Interrupts after Reset............................................................................................ 74
Features................................................................................................................ 79
.......................................................................................... 79
......................................................................................... 69
.................................................................................. 59